PragmatIC is seeking multiple ASIC Engineers to design and implement block and chip level digital designs for our flexible integrated circuits using our unique technology. Working as part of our RF Product and Emerging Applications teams, the roles will be focused on developing our portfolio of products, as well as focusing on new IP generation for both internal and external customers.
The roles will also serve as an internal customer to PragmatIC’s FlexIC Foundry, providing early-stage feedback on our digital cell developments and contributing directly to our digital roadmap.
- Digital RTL design and simulation
- Digital physical implementation
- Chip assembly and verification
- Digital design flow maintenance
- Product design documentation
- Engagement with Test Engineers throughout the evaluation process
Qualifications and training
The successful candidate will ideally be educated to Masters/PhD level in Electronics or Electrical Engineering (or possess equivalent experience)
Skills and experience
- RTL design and simulation, in Verilog or VHDL
- Knowledge of, or experience with, digital design tools; simulation, synthesis, place & route, CTS, parasitic extraction, STA, timing closure, verification, power analysis, formal verification, DFT
- Experience with Cadence or Mentor tools
- Calibre DRC/LVS verification
- Ability to communicate clearly
- Ability to work independently and as part of a team
- Willingness to work under pressure to tight deadlines
- Design for Test
- Strong scripting ability (shell, python, etc) - advantage
- IC full custom design experience - advantage
This is an excellent opportunity for the right person to join a developing team in an exciting period of growth.